This invention relates to a plasma processing apparatus which uses plasma to work the surface of a sample such as a semiconductor wafer, in the process of fabricating semiconductor devices, and more particularly to a plasma processing apparatus wherein the sample is processed while the temperature of the sample stage for holding the sample is being controlled.
It is important to keep the surface of the semiconductor wafer under processing precisely at a predetermined temperature in a fabricating process using such a plasma processing apparatus as mentioned just above wherein the surface of the semiconductor wafer as a sample is processed to form fine patterns serving as semiconductor device circuits with high precision. If the temperature of the wafer surface can be maintained at the optimal value as the steps of the fabrication process proceed, then the selective ratio and the throughput of the processing as well as the precision of working can be improved.
Today, the surface area of the semiconductor wafer to be processed is becoming larger and larger with the result that the high-frequency power consumed in the process is also increasing. Especially, in the process of etching the interlayer insulation films for insulating from one another the multiple layers to serve as semiconductor devices, power in the order of kilowatts must be supplied so as to maintain a high speed in etching. The application of such heavy power causes the increase in the energy of ions bombarding the surface of the semiconductor wafer so that the inflow of heat into the semiconductor wafer also increases. To cope with this increase in the heat inflow, therefore, the sample stage for holding the semiconductor wafer must have such a function that it can adjust the temperature of the wafer to a predetermined value quickly enough against such increase in heat inflow.
In controlling the temperature of wafer surface with such a plasma processing apparatus as described above, the temperature of the sample resting surface, which contacts the semiconductor wafer surface, of the sample stage is made controllable or variable. For example, the sample stage using a conventional technique incorporates therein ducts through which a heat exchange medium of liquid (e.g. fluorinate) passes so as to dissipate such heat inflow as mentioned above, cool the sample stage and keep the wafer surface at a desired temperature.
Such liquid refrigerant is caused to flow through the ducts laid out in the sample stage after it has been adjusted to a predetermined temperature by means of a cooler or a heater installed in a refrigerant supplying apparatus (e.g. chiller unit) communicating with the ducts of the sample stage through a refrigerant pipeline. This refrigerant supplying apparatus has a reservoir such as a tank to contain liquid refrigerant in it and the liquid refrigerant whose temperature has been controlled is pumped out. Since the heat capacity of the liquid refrigerant is large, it is easy to keep the sample stage and the semiconductor wafer placed on it, at a predetermined temperature.
On the other hand, however, there still is a problem that when it is required to change the temperature of the sample stage or the semiconductor wafer, the response in control is poor so that it is difficult to adjust the temperature to a desired value in short time. Further, since the efficiency of heat transfer is low, the flow rate or the pressure of the refrigerant must be increased if there is large heat inflow into the sample stage. This must lead to the increase in the size of the cooling apparatus and therefore the increase in the running cost thereof.
To solve such a problem, there has been provided a plasma processing apparatus having a so-called sample stage of direct refrigerant expansion type (hereafter referred to as DRE type), wherein the sample stage is incorporated in a cooling circuit, that is, wherein a compressor for pressurizing the refrigerant, a condenser for condensing the pressurized refrigerant, an expansion valve for expanding the refrigerant and the sample stage are communicated through refrigerant pipelines so that the sample stage is cooled by the latent heat generated in the evaporation of the liquid refrigerant within the sample stage. This type of sample stage is known as disclosed in the Japanese patent documents such as JP-A-06-346250 and JP-2005-89864. These conventional techniques, provided with the sample stage of DRE type, aim to adjust the semiconductor wafer at a predetermined temperature with high efficiency and speed even in the case of increased heat inflow during the fabrication process.